core22 min studyLesson 133 in Engineering

Separate urgent interrupt work from deferred execution

Reason about interrupt context, threaded and bottom-half work, and service pressure without assuming every deferred callback may sleep.

On this page

What you’ll understand

  • Distinguish hardware notification from the task that requested an operation.
  • Match deferred execution to its actual context and blocking rules.
  • Estimate interrupt CPU demand and explain why shorter handlers can shift rather than remove work.

A device completes an operation while an unrelated thread is executing. The processor must arrange for the operating system to notice that event, update relevant state, and eventually let the waiting operation proceed. Doing every part immediately can make other urgent events wait; deferring everything without a plan can create a growing backlog. The engineering problem is to preserve correctness while choosing where and when each part of the work is allowed to execute.

An interrupt announces an event, not a process switch

A hardware interrupt can arrive while a CPU is running user code, kernel code, or an idle path. Its source does not have to belong to the task currently running on that CPU. Entry and exit establish the architecture-specific state needed to handle it safely. The handler may acknowledge a device and record completion information, but those details depend on the hardware and driver. The interrupted instruction stream can resume afterward. A notification therefore does not by itself imply that the scheduler selected a different process or that the interrupted thread requested the event.

Interrupt latency describes delay before the relevant handling begins, while handler duration describes time spent doing that work. End-to-end completion latency includes additional stages such as deferred processing, waking a waiter, and waiting for that task to run. Lowering one stage does not automatically lower every stage. A driver that shortens its immediate handler by queueing more work may reduce time spent in that context while increasing completion delay under load. State which interval a measurement covers before using the word latency as if it named a single universal quantity.

Uirq=rh106U_{\mathrm{irq}}=\frac{r h}{10^6}
For a hypothetical single CPU, r interrupts per second and mean immediate-handler duration h microseconds per interrupt imply a CPU-time demand fraction U_irq. It ignores nesting, deferred work, batching, and other execution; values near one expose an infeasible or fragile budget rather than predict exact scheduling.↔ Scroll wide equations horizontally.

Deferred work still has an execution context

Deferral is a scheduling choice, not permission to call any kernel function. A conventional hard-interrupt handler cannot simply sleep waiting for a mutex or external event. Softirq and bottom-half execution also carries restrictions. Threaded interrupt handlers and ordinary threaded workqueues provide different contexts where blocking may be permitted if the particular code path and locks allow it. Read the API contract for the selected mechanism. Do not infer sleepability from a callback's name, from the fact that it runs later, or from an example written for a different kernel configuration.

Linux workqueues make this distinction especially important: ordinary worker threads and bottom-half workqueues are not interchangeable execution environments. Workqueue attributes can affect placement, concurrency, ordering, and forward progress. An ordered workqueue is appropriate when the contract requires that ordering; a concurrency limit alone should not be assumed to establish the same semantics. Teardown must also stop new submissions and synchronize with outstanding callbacks before freeing their state. Moving a callback to a later time can solve an immediate latency problem while introducing an object-lifetime race if ownership ends first.

Tcompletion=Tnotification+Timmediate+Tdeferred wait+Tdeferred run+Twake to runT_{\mathrm{completion}}=T_{\mathrm{notification}}+T_{\mathrm{immediate}}+T_{\mathrm{deferred\ wait}}+T_{\mathrm{deferred\ run}}+T_{\mathrm{wake\ to\ run}}
Each term is an elapsed-time interval in seconds along one explicitly defined completion path. The identity assumes nonoverlapping stages for that path; batching and parallel processing require a more detailed dependency timeline rather than blindly summing all work on all CPUs.↔ Scroll wide equations horizontally.

Budget the complete path under load

Suppose device completions arrive faster than a deferred worker can process them. A short immediate handler can keep acknowledging notifications while the downstream queue grows. The backlog represents unfinished work and may retain buffers, references, or requests. Capacity analysis therefore needs both immediate-handler CPU demand and deferred-service throughput, plus bounds on memory and completion age. Interrupt moderation or polling may trade notification rate against batching delay, but whether that helps depends on the device, driver, traffic pattern, and measured application objective. There is no universally optimal interrupt rate independent of workload.

Use the queue lab to predict what happens when the rate of deferred items exceeds their service rate. For a growing run, press Reset, re-set arrival rate to 4 and service rate to 2, predict growth from four items, then press Play or Step. For a separate draining run, reset again, re-set both rates to arrival 4 and service 5, predict that its fresh four-item backlog reaches zero after four seconds, then inspect it. This comparison does not continue the first run's accumulated backlog under new rates. This fluid model has no interrupt masking, CPU affinity, workqueue flags, or kernel callback execution. It illustrates the capacity balance only. A real investigation should correlate notification counts, deferred queue age, CPU usage, and completed requests so that a lower interrupt count is not mistaken for an improvement while unobserved completion work accumulates elsewhere.

Find the work hidden behind a short handler

A fictional device produces 20,000 notifications per second. Each immediate handler takes 3 μs of CPU and queues one deferred item needing 12 μs of CPU. Assume all this work runs on one CPU, rates are steady, and there is no overlap or other overhead.

  1. Immediate handling demands 20,000 × 3 μs = 60,000 μs of CPU per second, or 0.06 of one CPU.

  2. Deferred execution demands 20,000 × 12 μs = 240,000 μs per second, or 0.24 of one CPU. Add the disjoint demands to obtain 0.30 of one CPU for the complete work.

  3. If contention leaves the deferred worker only 0.18 CPU-seconds per second, its service ceiling is 0.18 / 0.000012 = 15,000 items per second. At 20,000 arrivals, unfinished items grow by 5,000 per second despite the short immediate handler.

The result

The immediate path consumes six percent of a CPU, but the specified complete path needs thirty percent. A constrained deferred stage can overload independently of the immediate-handler duration.

Explore the model

Interactive lab

Interactive lab · queue

Deferred work must still be served

For each separate fixed-rate experiment: Reset, re-set both arrival rate λ and service rate μ, predict, then Play or Step. Compare λ=4, μ=2 growth with a fresh λ=4, μ=5 run that drains its initial four items in four seconds. Control edits retain elapsed time; they do not apply a live rate change to the previous backlog. This remains a capacity analogy, not an interrupt, workqueue, or CPU-affinity simulator.

Deferred work must still be servedFluid backlog starts at 4 and follows max(0, 4 + (λ − μ)t). The separate M/M/1 residence-time formula assumes Poisson arrivals, exponential service and λ < μ. Current readings: Fluid backlog: 4; Net rate · λ − μ: −1 /s; M/M/1 mean residence: 1 s. All parameters are adjustable with the labeled controls below.02.557.51001.534.56Elapsed time · sFluid backlogλ < μ
Fluid backlogCurrent time
Fluid backlog
4
Net rate · λ − μ
−1 /s
M/M/1 mean residence
1 s
t = 0 s

Fluid backlog starts at 4 and follows max(0, 4 + (λ − μ)t). The separate M/M/1 residence-time formula assumes Poisson arrivals, exponential service and λ < μ. Parameter changes pause playback and recompute the model at the current elapsed time. Reset restores both parameters and returns time to zero. Playback starts paused. Adjust either parameter, then choose Play or Step.

Look forDeferring a computation changes where it waits and executes; it does not remove its resource demand.

Check your understanding

A driver moves expensive work out of a hard-interrupt handler. Which further question is necessary?

Try it yourself

A deferred stage begins with 200 pending items, receives 6,000 items per second, and can complete 8,000 items per second. In a constant-rate fluid approximation, how long until its initial backlog drains? Why is that not a tail-latency guarantee?

Take a moment to make a prediction or work it out on paper. Open a hint when you need one.

Give me a hint

Use the net drain rate, then identify the variation omitted by constant rates.

Compare with the solution

The net drain rate is 2,000 items per second, so 200 / 2,000 = 0.1 seconds. Bursty arrivals, variable service, CPU contention, ordering constraints, and individual item dependencies are absent from the fluid approximation. A positive average spare rate therefore does not establish a bound on any particular completion's latency.

Take it with you

  • Notification, immediate handling, deferred execution, and wakeup are different stages.
  • Deferred callbacks inherit the rules of their actual execution context.
  • A shorter immediate handler can shift CPU demand and waiting into another queue.

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