Hardware counters as evidence
Turn event counts into defensible ratios while checking scope, multiplexing, and competing explanations.
On this page
The question for today
What you’ll understand
- State the scope and definition of a measured hardware event.
- Calculate IPC, misses per thousand instructions, and a multiplex-scaled count.
- Distinguish a counter correlation from a causal performance explanation.
A counter reports that a defined event was counted under a particular measurement configuration. It does not directly say why users waited or which change will help. Architecture-specific event definitions, process scope, privilege filters, scheduling, and sampling all affect interpretation. Start from elapsed time and useful work, then use a small set of well-understood events to test a concrete mechanism. More event names do not automatically create stronger evidence.
An event name needs a counting contract
Determine whether an event counts retired operations, speculative activity, requests, fills, cycles, or something else. A label containing 'cache miss' does not necessarily mean all misses at every level or exactly one transfer from DRAM. Event encodings and support vary with processor model and sometimes with core type. Use the target's documentation and the tool's resolved event description, then record the exact configuration so another person can reproduce the same quantity.
Scope also matters. A process measurement, a per-thread measurement, and a system-wide count can include different work. User-only filters exclude kernel execution that may still contribute to elapsed time. Thread migration or hybrid cores may complicate which events were available. Wall time includes waiting and descheduling, while counted CPU cycles describe selected execution contexts. A low cycle count during a slow request can indicate waiting elsewhere rather than a remarkably efficient computation.
Multiplexing estimates what was not observed
A processor exposes a limited number of programmable counters. Requesting more simultaneous events may cause the measurement system to time-share them. A common scaling procedure multiplies the raw count by enabled time divided by actual running time. This estimates the full-interval count only when the observed portions represent the unobserved portions well enough. Report running coverage; a large scaled number with tiny coverage can convey unwarranted precision.
Phase changes are especially dangerous. If one event runs mostly during initialization and another mostly during steady computation, their individually scaled totals can produce a misleading ratio. Grouping compatible events can help obtain simultaneous observations, but hardware constraints may prevent scheduling a group. A measurement that reports an event as unsupported or not counted is missing evidence, not a zero. Reduce the event set and repeat a representative workload before drawing conclusions from the ratio.
Counters test a mechanism, not a story
Suppose a layout change reduces both elapsed time and one miss metric. That supports a locality hypothesis, but a simultaneous reduction in instructions or a changed thread count may provide another explanation. Hold useful work fixed, preserve correctness, and compare repeated runs with warmup and initialization treated consistently. Normalize counts by meaningful work units such as processed records when that makes cross-run comparisons clearer. Retain absolute totals because a ratio can improve while total cost grows.
The probability lab shows exact binomial distributions for independent trials with common probability p. Set p=0.5 and compare n=10 with n=30: predict a larger absolute standard deviation but a smaller standard deviation of the success fraction. This is a statistical contrast, not a counter-error estimator. Real measurements may contain correlated phases and systematic bias; additional repetitions do not remove those automatically. The lab cannot infer confidence intervals for multiplexed hardware counters from one running-percentage value.
Work it through
Compatible ratios and a coverage warning
A controlled interval records 2 billion retired instructions and 1 billion compatible cycles. A defined miss event records 2 million misses. Another event counts 40 million raw occurrences while running for 0.25 s of a 1 s enabled interval.
Compute IPC as 2 billion/1 billion=2 instructions per counted cycle. Compute MPKI as 1,000×2 million/2 billion=1 miss per thousand instructions, preserving the miss event's exact definition.
Scale the other event by 1/0.25=4 to estimate 160 million occurrences over the enabled interval. Coverage is only 25%, so the estimate depends strongly on whether the observed quarter represents the rest.
If the observed quarter contained a busy initialization phase while the remaining time was mostly idle, uniform scaling overestimates the total. Collect a smaller simultaneous event set or isolate phases before treating the estimate as evidence for a bottleneck.
The arithmetic is straightforward; compatible scope and representative coverage determine whether the calculated ratios deserve interpretation.
The living notebook
Explore the model
Interactive lab · probability
Random variability versus systematic measurement bias
Set binomial p=0.5 and compare trial counts n=10 and n=30. Predict how spread in counts differs from spread in the success fraction. This exact iid model is not a confidence calculation for correlated or multiplexed hardware events.
- Mean · np
- 5
- Variance · np(1−p)
- 2.5
- Total probability
- 1
These are exact binomial probabilities for independent trials with one fixed success probability. Playback tours the distribution; it does not resample outcomes. Parameter changes pause playback and recompute the model at the current elapsed time. Reset restores both parameters and returns time to zero. Playback starts paused. Adjust either parameter, then choose Play or Step.
Look forMore observations can reduce random fraction variability under assumptions, but cannot automatically repair biased event coverage.
Pause & reason
Check your understanding
Your turn
Try it yourself
One run processes one million records with 400 million instructions; another processes two million records with 600 million instructions. Compute instructions per record and explain why the lower normalized count alone does not prove lower latency.
Take a moment to make a prediction or work it out on paper. Open a hint when you need one.
Give me a hint
Divide each instruction total by its useful record count, then identify missing time information.
Compare with the solution
The first run uses 400 instructions per record and the second 300, a 25% reduction in normalized instruction count. Total instructions nevertheless rise from 400 to 600 million because more work is completed. Latency and throughput still depend on elapsed time, dependencies, memory behavior, parallelism, and comparable record semantics. Check both normalized work and actual completion time.
Keep the idea
Take it with you
- Event definitions, scope, and compatible intervals come before ratios.
- Multiplex scaling assumes representative coverage and is not exact reconstruction.
- Use counters to test a controlled hypothesis alongside elapsed time and useful work.
Read further
Original sources and deeper explanations to follow at your own pace.
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